The present invention relates to a network processor and method for processing packet switching in a network switching system, and more particularly, to a network processor and method capable of storing a packet to a designated memory according to a congestion status of a network switching system.
With the rapid development of wireless network technology, more and more network services such as wire-speed, Quality of Service (QoS), low power, virtual private network (VPN), storage, multicast, content scanning, firewall, etc. are required to be included in an access point (AP) or a router. In order to achieve these requirements, a network switching system may use a more powerful central processing unit (CPU), a larger Level 1 (L1) and Level 2 (L2) cache, and a faster random access memory (RAM). In recent years, a cost-effective solution that uses a hardware accelerator for accelerating data processing is provided, in order to offload these network services.
However, for packet switching between these heterogeneous network services and various network ports, the conventional network switching system may not perform packet switching efficiently and completely due to inherent limitation of the memory used in the network switching system, especially when the traffic of the network switching system is congested. Therefore, there is a need for improvement over the prior art.